linux-imx

    mvebu_gpio_blink(chip, pin, 0);

    mvebu_gpio_set(chip, pin, value);

​

    regmap_update_bits(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset,

               BIT(pin), 0);

​

    return 0;

}

​

static int mvebu_gpio_to_irq(struct gpio_chip *chip, unsigned int pin)

{

    struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip);

​

    return irq_create_mapping(mvchip->domain, pin);

}

​

/*

 * Functions implementing the irq_chip methods

 */

    /* Not all SoCs require a clock.*/

    if (!IS_ERR(mvchip->clk))

        clk_prepare_enable(mvchip->clk);

​

    mvchip->soc_variant = soc_variant;

    mvchip->chip.label = dev_name(&pdev->dev);

    mvchip->chip.parent = &pdev->dev;

    mvchip->chip.request = gpiochip_generic_request;

    mvchip->chip.free = gpiochip_generic_free;

    mvchip->chip.direction_input = mvebu_gpio_direction_input;

    mvchip->chip.get = mvebu_gpio_get;

    mvchip->chip.direction_output = mvebu_gpio_direction_output;

    mvchip->chip.set = mvebu_gpio_set;

    if (have_irqs)

        mvchip->chip.to_irq = mvebu_gpio_to_irq;

    mvchip->chip.base = id * MVEBU_MAX_GPIO_PER_BANK;

    mvchip->chip.ngpio = ngpios;

    mvchip->chip.can_sleep = false;

    mvchip->chip.of_node = np;