Source
538
538
static const struct regmap_config lm95245_regmap_config = {
539
539
.reg_bits = 8,
540
540
.val_bits = 8,
541
541
.writeable_reg = lm95245_is_writeable_reg,
542
542
.volatile_reg = lm95245_is_volatile_reg,
543
543
.cache_type = REGCACHE_RBTREE,
544
544
.use_single_read = true,
545
545
.use_single_write = true,
546
546
};
547
547
548
-
static const u32 lm95245_chip_config[] = {
549
-
HWMON_C_UPDATE_INTERVAL,
550
-
0
551
-
};
552
-
553
-
static const struct hwmon_channel_info lm95245_chip = {
554
-
.type = hwmon_chip,
555
-
.config = lm95245_chip_config,
556
-
};
557
-
558
-
static const u32 lm95245_temp_config[] = {
559
-
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_CRIT_ALARM,
560
-
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
561
-
HWMON_T_CRIT_HYST | HWMON_T_FAULT | HWMON_T_MAX_ALARM |
562
-
HWMON_T_CRIT_ALARM | HWMON_T_TYPE | HWMON_T_OFFSET,
563
-
0
564
-
};
565
-
566
-
static const struct hwmon_channel_info lm95245_temp = {
567
-
.type = hwmon_temp,
568
-
.config = lm95245_temp_config,
569
-
};
570
-
571
548
static const struct hwmon_channel_info *lm95245_info[] = {
572
-
&lm95245_chip,
573
-
&lm95245_temp,
549
+
HWMON_CHANNEL_INFO(chip,
550
+
HWMON_C_UPDATE_INTERVAL),
551
+
HWMON_CHANNEL_INFO(temp,
552
+
HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_HYST |
553
+
HWMON_T_CRIT_ALARM,
554
+
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
555
+
HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_FAULT |
556
+
HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
557
+
HWMON_T_TYPE | HWMON_T_OFFSET),
574
558
NULL
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559
};
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560
577
561
static const struct hwmon_ops lm95245_hwmon_ops = {
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.is_visible = lm95245_is_visible,
579
563
.read = lm95245_read,
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564
.write = lm95245_write,
581
565
};
582
566
583
567
static const struct hwmon_chip_info lm95245_chip_info = {