linux-imx

    default:

        dev_err(&gpio_dev->pdev->dev, "Invalid type value\n");

        ret = -EINVAL;

    }

​

    pin_reg |= CLR_INTR_STAT << INTERRUPT_STS_OFF;

    /*

     * If WAKE_INT_MASTER_REG.MaskStsEn is set, a software write to the

     * debounce registers of any GPIO will block wake/interrupt status

     * WAKE_INT_MASTER_REG.MaskStsLength[11:0].  During this period the

     * INTERRUPT_ENABLE bit will read as 0.

     *

     * We temporarily enable irq for the GPIO whose configuration is

     * changing, and then wait for it to read back as 1 to know when

     * debounce has settled and then disable the irq again.

     * We do this polling with the spinlock held to ensure other GPIO

     * access routines do not read an incorrect value for the irq enable

     * bit of other GPIOs.  We keep the GPIO masked while polling to avoid

     * spurious irqs, and disable the irq again after polling.