Source
339
339
spin_lock_init(&c->lock);
340
340
INIT_LIST_HEAD(&c->queue);
341
341
init_waitqueue_head(&c->waitq);
342
342
343
343
c->clk = devm_clk_get(&dev->dev, "spi-baseclk");
344
344
if (IS_ERR(c->clk)) {
345
345
ret = PTR_ERR(c->clk);
346
346
c->clk = NULL;
347
347
goto exit;
348
348
}
349
-
ret = clk_enable(c->clk);
349
+
ret = clk_prepare_enable(c->clk);
350
350
if (ret) {
351
351
c->clk = NULL;
352
352
goto exit;
353
353
}
354
354
c->baseclk = clk_get_rate(c->clk);
355
355
master->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1);
356
356
master->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1);
357
357
358
358
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
359
359
c->membase = devm_ioremap_resource(&dev->dev, res);
388
388
master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */
389
389
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
390
390
391
391
ret = devm_spi_register_master(&dev->dev, master);
392
392
if (ret)
393
393
goto exit;
394
394
return 0;
395
395
exit_busy:
396
396
ret = -EBUSY;
397
397
exit:
398
-
clk_disable(c->clk);
398
+
clk_disable_unprepare(c->clk);
399
399
spi_master_put(master);
400
400
return ret;
401
401
}
402
402
403
403
static int txx9spi_remove(struct platform_device *dev)
404
404
{
405
405
struct spi_master *master = platform_get_drvdata(dev);
406
406
struct txx9spi *c = spi_master_get_devdata(master);
407
407
408
408
flush_work(&c->work);
409
-
clk_disable(c->clk);
409
+
clk_disable_unprepare(c->clk);
410
410
return 0;
411
411
}
412
412
413
413
/* work with hotplug and coldplug */
414
414
MODULE_ALIAS("platform:spi_txx9");
415
415
416
416
static struct platform_driver txx9spi_driver = {
417
417
.probe = txx9spi_probe,
418
418
.remove = txx9spi_remove,
419
419
.driver = {