uboot-imx

MLK-17200-3 mx7ulp: Select the SCG1 APLL PFD as a system clock source

Due to the APLL out glitch issue TKT332232, the APLLCFG PLLS bit must be set
to select SCG1 APLL PFD for generating system clock to align with the design.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 242823400c5bd59960e1b40d941e177e8ebad57e)
(cherry picked from commit 3c8d8b0a95f8b1132e301e7e00955846b12aa4cc)