Commits
Murali Karicheri committed 63d31929845
net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017, advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not supported (see note below Table 5 (4-Level Strap Pins)). It further advises that if a board has this pin strapped in mode 1 and mode 2, then bit[7] of Configuration Register 4 (address 0x0031) must be cleared to 0. This is to ensure proper operation of PHY. Since it is not possible to detect in software if RX_DV/RX_CTRL pin is incorrectly strapped, add a device-tree property to advertise this and allow corrective action in software. [1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>