Source
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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2015 Marek Vasut <marex@denx.de>
*
* DesignWare APB GPIO driver
*/
struct gpio_dwapb_priv {
struct reset_ctl_bulk resets;
};
struct gpio_dwapb_platdata {
const char *name;
int bank;
int pins;
fdt_addr_t base;
};
static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
{
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
return 0;
}
static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
int val)
{
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
if (val)
setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
else
clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
return 0;
}
static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
{
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin));
}
static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
{
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
if (val)
setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
else
clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
return 0;
}
static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset)
{
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
u32 gpio;
gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank));
if (gpio & BIT(offset))
return GPIOF_OUTPUT;