Source
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// SPDX-License-Identifier: GPL-2.0+
/*
* Qualcomm GPIO driver
*
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
DECLARE_GLOBAL_DATA_PTR;
/* Register offsets */
/* OE */
/* GPIO_IN_OUT register shifts. */
struct msm_gpio_bank {
phys_addr_t base;
};
static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
/* Disable OE bit */
clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
return 0;
}
static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
value = !!value;
/* set value */
writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
return 0;
}
static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
int value)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
value = !!value;
/* set value */
writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
/* switch direction */
clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE);
return 0;
}
static int msm_gpio_get_value(struct udevice *dev, unsigned gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
return !!(readl(priv->base + GPIO_IN_OUT_OFF(gpio)) >> GPIO_IN);
}
static int msm_gpio_get_function(struct udevice *dev, unsigned offset)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE)
return GPIOF_OUTPUT;
return GPIOF_INPUT;
}
static const struct dm_gpio_ops gpio_msm_ops = {
.direction_input = msm_gpio_direction_input,
.direction_output = msm_gpio_direction_output,
.get_value = msm_gpio_get_value,
.set_value = msm_gpio_set_value,
.get_function = msm_gpio_get_function,