#include <linux/bitops.h>
#define REG_OFFSET(x) ((x) * 0x100)
#define REG_STATUS_VAL_MASK 0x1
#define REG_CTL_MODE_MASK 0x70
#define REG_CTL_MODE_INPUT 0x00
#define REG_CTL_MODE_INOUT 0x20
#define REG_CTL_MODE_OUTPUT 0x10
#define REG_CTL_OUTPUT_MASK 0x0F
#define REG_DIG_VIN_CTL 0x41
#define REG_DIG_VIN_VIN0 0
#define REG_DIG_PULL_CTL 0x42
#define REG_DIG_PULL_NO_PU 0x5
#define REG_DIG_OUT_CTL 0x45
#define REG_DIG_OUT_CTL_CMOS (0x0 << 4)
#define REG_DIG_OUT_CTL_DRIVE_L 0x1
#define REG_EN_CTL_ENABLE (1 << 7)
struct pm8916_gpio_bank {
static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset,
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL,
ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL,
ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL,
REG_CTL_MODE_INOUT | (value ? 1 : 0));
ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_PULL_CTL,
ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_VIN_CTL,
ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_OUT_CTL,