uboot-phytec

// SPDX-License-Identifier: GPL-2.0+

/*

 * Copyright (c) 2013 - 2018 Xilinx, Michal Simek

 */

​

#include <common.h>

#include <errno.h>

#include <malloc.h>

#include <linux/list.h>

#include <asm/io.h>

#include <asm/gpio.h>

#include <dm.h>

#include <dt-bindings/gpio/gpio.h>

​

#define XILINX_GPIO_MAX_BANK    2

​

/* Gpio simple map */

struct gpio_regs {

    u32 gpiodata;

    u32 gpiodir;

};

​

struct xilinx_gpio_platdata {

    struct gpio_regs *regs;

    int bank_max[XILINX_GPIO_MAX_BANK];

    int bank_input[XILINX_GPIO_MAX_BANK];

    int bank_output[XILINX_GPIO_MAX_BANK];

    u32 dout_default[XILINX_GPIO_MAX_BANK];

};

​

struct xilinx_gpio_privdata {

    u32 output_val[XILINX_GPIO_MAX_BANK];

};

​

static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num,

                    u32 *bank_pin_num, struct udevice *dev)

{

    struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);

    u32 bank, max_pins;

    /* the first gpio is 0 not 1 */

    u32 pin_num = offset;

​

    for (bank = 0; bank < XILINX_GPIO_MAX_BANK; bank++) {

        max_pins = platdata->bank_max[bank];

        if (pin_num < max_pins) {

            debug("%s: found at bank 0x%x pin 0x%x\n", __func__,

                  bank, pin_num);

            *bank_num = bank;

            *bank_pin_num = pin_num;

            return 0;

        }

        pin_num -= max_pins;

    }

​

    return -EINVAL;

}

​

static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset,

                 int value)

{

    struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);

    struct xilinx_gpio_privdata *priv = dev_get_priv(dev);

    int val, ret;

    u32 bank, pin;

​

    ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev);

    if (ret)

        return ret;

​

    val = priv->output_val[bank];

​

    debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x, out %x\n",

          __func__, (ulong)platdata->regs, value, offset, bank, pin, val);

​

    if (value)

        val = val | (1 << pin);

    else

        val = val & ~(1 << pin);

​

    writel(val, &platdata->regs->gpiodata + bank * 2);

​

    priv->output_val[bank] = val;

​

    return 0;

};

​

static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)

{

    struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);

    struct xilinx_gpio_privdata *priv = dev_get_priv(dev);

    int val, ret;

    u32 bank, pin;