uboot-phytec

// SPDX-License-Identifier: GPL-2.0

/*

 * bcm2835 sdhost driver.

 *

 * The 2835 has two SD controllers: The Arasan sdhci controller

 * (supported by the iproc driver) and a custom sdhost controller

 * (supported by this driver).

 *

 * The sdhci controller supports both sdcard and sdio.  The sdhost

 * controller supports the sdcard only, but has better performance.

 * Also note that the rpi3 has sdio wifi, so driving the sdcard with

 * the sdhost controller allows to use the sdhci controller for wifi

 * support.

 *

 * The configuration is done by devicetree via pin muxing.  Both

 * SD controller are available on the same pins (2 pin groups = pin 22

 * to 27 + pin 48 to 53).  So it's possible to use both SD controllers

 * at the same time with different pin groups.

 *

 * This code was ported to U-Boot by

 *  Alexander Graf <agraf@suse.de>

 * and is based on drivers/mmc/host/bcm2835.c in Linux which is written by

 *  Phil Elwell <phil@raspberrypi.org>

 *  Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd.

 * which is based on

 *  mmc-bcm2835.c by Gellert Weisz

 * which is, in turn, based on

 *  sdhci-bcm2708.c by Broadcom

 *  sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko

 *  sdhci.c and sdhci-pci.c by Pierre Ossman

 */

#include <clk.h>

#include <common.h>

#include <dm.h>

#include <mmc.h>

#include <asm/arch/msg.h>

#include <asm/arch/mbox.h>

#include <asm/unaligned.h>

#include <linux/compat.h>

#include <linux/io.h>

#include <linux/iopoll.h>

#include <linux/sizes.h>

#include <mach/gpio.h>

#include <power/regulator.h>

​

#define msleep(a) udelay(a * 1000)

​

#define SDCMD  0x00 /* Command to SD card              - 16 R/W */

#define SDARG  0x04 /* Argument to SD card             - 32 R/W */

#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */

#define SDCDIV 0x0c /* Start value for clock divider   - 11 R/W */

#define SDRSP0 0x10 /* SD card response (31:0)         - 32 R   */

#define SDRSP1 0x14 /* SD card response (63:32)        - 32 R   */

#define SDRSP2 0x18 /* SD card response (95:64)        - 32 R   */

#define SDRSP3 0x1c /* SD card response (127:96)       - 32 R   */

#define SDHSTS 0x20 /* SD host status                  - 11 R/W */

#define SDVDD  0x30 /* SD card power control           -  1 R/W */

#define SDEDM  0x34 /* Emergency Debug Mode            - 13 R/W */

#define SDHCFG 0x38 /* Host configuration              -  2 R/W */

#define SDHBCT 0x3c /* Host byte count (debug)         - 32 R/W */

#define SDDATA 0x40 /* Data to/from SD card            - 32 R/W */

#define SDHBLC 0x50 /* Host block count (SDIO/SDHC)    -  9 R/W */

​

#define SDCMD_NEW_FLAG          0x8000

#define SDCMD_FAIL_FLAG         0x4000

#define SDCMD_BUSYWAIT          0x800

#define SDCMD_NO_RESPONSE       0x400

#define SDCMD_LONG_RESPONSE     0x200

#define SDCMD_WRITE_CMD         0x80

#define SDCMD_READ_CMD          0x40

#define SDCMD_CMD_MASK          0x3f

​

#define SDCDIV_MAX_CDIV         0x7ff

​

#define SDHSTS_BUSY_IRPT        0x400

#define SDHSTS_BLOCK_IRPT       0x200

#define SDHSTS_SDIO_IRPT        0x100

#define SDHSTS_REW_TIME_OUT     0x80

#define SDHSTS_CMD_TIME_OUT     0x40

#define SDHSTS_CRC16_ERROR      0x20

#define SDHSTS_CRC7_ERROR       0x10

#define SDHSTS_FIFO_ERROR       0x08

#define SDHSTS_DATA_FLAG        0x01

​

#define SDHSTS_CLEAR_MASK       (SDHSTS_BUSY_IRPT | \

                     SDHSTS_BLOCK_IRPT | \

                     SDHSTS_SDIO_IRPT | \

                     SDHSTS_REW_TIME_OUT | \

                     SDHSTS_CMD_TIME_OUT | \

                     SDHSTS_CRC16_ERROR | \

                     SDHSTS_CRC7_ERROR | \

                     SDHSTS_FIFO_ERROR)