static int ag7xxx_switch_read(struct mii_dev *bus, int addr, int reg, u16 *val)
#include <linux/compiler.h>
#define AG7XXX_ETH_CFG1 0x00
#define AG7XXX_ETH_CFG1_SOFT_RST BIT(31)
#define AG7XXX_ETH_CFG1_RX_RST BIT(19)
#define AG7XXX_ETH_CFG1_TX_RST BIT(18)
#define AG7XXX_ETH_CFG1_LOOPBACK BIT(8)
#define AG7XXX_ETH_CFG1_RX_EN BIT(2)
#define AG7XXX_ETH_CFG1_TX_EN BIT(0)
#define AG7XXX_ETH_CFG2 0x04
#define AG7XXX_ETH_CFG2_IF_1000 BIT(9)
#define AG7XXX_ETH_CFG2_IF_10_100 BIT(8)
#define AG7XXX_ETH_CFG2_IF_SPEED_MASK (3 << 8)
#define AG7XXX_ETH_CFG2_HUGE_FRAME_EN BIT(5)
#define AG7XXX_ETH_CFG2_LEN_CHECK BIT(4)
#define AG7XXX_ETH_CFG2_PAD_CRC_EN BIT(2)
#define AG7XXX_ETH_CFG2_FDX BIT(0)
#define AG7XXX_ETH_MII_MGMT_CFG 0x20
#define AG7XXX_ETH_MII_MGMT_CFG_RESET BIT(31)
#define AG7XXX_ETH_MII_MGMT_CMD 0x24
#define AG7XXX_ETH_MII_MGMT_CMD_READ 0x1
#define AG7XXX_ETH_MII_MGMT_ADDRESS 0x28
#define AG7XXX_ETH_MII_MGMT_ADDRESS_SHIFT 8
#define AG7XXX_ETH_MII_MGMT_CTRL 0x2c
#define AG7XXX_ETH_MII_MGMT_STATUS 0x30
#define AG7XXX_ETH_MII_MGMT_IND 0x34
#define AG7XXX_ETH_MII_MGMT_IND_INVALID BIT(2)
#define AG7XXX_ETH_MII_MGMT_IND_BUSY BIT(0)
#define AG7XXX_ETH_ADDR1 0x40
#define AG7XXX_ETH_ADDR2 0x44
#define AG7XXX_ETH_FIFO_CFG_0 0x48
#define AG7XXX_ETH_FIFO_CFG_1 0x4c
#define AG7XXX_ETH_FIFO_CFG_2 0x50
#define AG7XXX_ETH_FIFO_CFG_3 0x54
#define AG7XXX_ETH_FIFO_CFG_4 0x58
#define AG7XXX_ETH_FIFO_CFG_5 0x5c
#define AG7XXX_ETH_DMA_TX_CTRL 0x180
#define AG7XXX_ETH_DMA_TX_CTRL_TXE BIT(0)
#define AG7XXX_ETH_DMA_TX_DESC 0x184
#define AG7XXX_ETH_DMA_TX_STATUS 0x188