Source
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printf("control:0x%x; ptr:0x%x; addrl:0x%x; addrh:0x%x; stat0:0x%x, stat1:0x%x\n",
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2017 Broadcom.
*/
static int gmac_disable_dma(struct eth_dma *dma, int dir);
static int gmac_enable_dma(struct eth_dma *dma, int dir);
/* DMA Descriptor */
typedef struct {
/* misc control bits */
uint32_t ctrl1;
/* buffer count and address extension */
uint32_t ctrl2;
/* memory address of the date buffer, bits 31:0 */
uint32_t addrlow;
/* memory address of the date buffer, bits 63:32 */
uint32_t addrhigh;
} dma64dd_t;
uint32_t g_dmactrlflags;
static uint32_t dma_ctrlflags(uint32_t mask, uint32_t flags)
{
debug("%s enter\n", __func__);
g_dmactrlflags &= ~mask;
g_dmactrlflags |= flags;
/* If trying to enable parity, check if parity is actually supported */
if (g_dmactrlflags & DMA_CTRL_PEN) {
uint32_t control;
control = readl(GMAC0_DMA_TX_CTRL_ADDR);
writel(control | D64_XC_PD, GMAC0_DMA_TX_CTRL_ADDR);
if (readl(GMAC0_DMA_TX_CTRL_ADDR) & D64_XC_PD) {
/*
* We *can* disable it, therefore it is supported;
* restore control register
*/
writel(control, GMAC0_DMA_TX_CTRL_ADDR);
} else {
/* Not supported, don't allow it to be enabled */
g_dmactrlflags &= ~DMA_CTRL_PEN;
}
}
return g_dmactrlflags;
}
static inline void reg32_clear_bits(uint32_t reg, uint32_t value)
{
uint32_t v = readl(reg);
v &= ~(value);
writel(v, reg);
}
static inline void reg32_set_bits(uint32_t reg, uint32_t value)
{
uint32_t v = readl(reg);
v |= value;
writel(v, reg);
}