Source
/* Enable interrupt on frames with extra data */
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Cirrus Logic CS8900A Ethernet
*
* (C) 2009 Ben Warren , biggerbadderben@gmail.com
* Converted to use CONFIG_NET_MULTI API
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* Copyright (C) 1999 Ben Williamson <benw@pobox.com>
*
* This program is loaded into SRAM in bootstrap mode, where it waits
* for commands on UART1 to read and write memory, jump to code etc.
* A design goal for this program is to be entirely independent of the
* target board. Anything with a CL-PS7111 or EP7211 should be able to run
* this code in bootstrap mode. All the board specifics can be handled on
* the host.
*/
/* although the registers are 16 bit, they are 32-bit aligned on the
EDB7111. so we have to read them as 32-bit registers and ignore the
upper 16-bits. i'm not sure if this holds for the EDB7211. */
/* 16 bit aligned registers, 16 bit wide */
/* 32 bit aligned registers, 16 bit wide (we ignore upper 16 bits) */
struct cs8900_regs {
CS8900_REG rtdata;
CS8900_REG pad0;
CS8900_REG txcmd;
CS8900_REG txlen;
CS8900_REG isq;
CS8900_REG pptr;
CS8900_REG pdata;
};
struct cs8900_priv {
struct cs8900_regs *regs;
};
/* packet page register offsets */