uboot-phytec

/*

   natsemi.c: A U-Boot driver for the NatSemi DP8381x series.

   Author: Mark A. Rakes (mark_rakes@vivato.net)

​

   Adapted from an Etherboot driver written by:

​

   Copyright (C) 2001 Entity Cyber, Inc.

​

   This development of this Etherboot driver was funded by

​

      Sicom Systems: http://www.sicompos.com/

​

   Author: Marty Connor (mdc@thinguin.org)

   Adapted from a Linux driver which was written by Donald Becker

​

   This software may be used and distributed according to the terms

   of the GNU Public License (GPL), incorporated herein by reference.

​

   Original Copyright Notice:

​

   Written/copyright 1999-2001 by Donald Becker.

​

   This software may be used and distributed according to the terms of

   the GNU General Public License (GPL), incorporated herein by reference.

   Drivers based on or derived from this code fall under the GPL and must

   retain the authorship, copyright and license notice.  This file is not

   a complete program and may only be used when the entire operating

   system is licensed under the GPL.  License for under other terms may be

   available.  Contact the original author for details.

​

   The original author may be reached as becker@scyld.com, or at

   Scyld Computing Corporation

   410 Severn Ave., Suite 210

   Annapolis MD 21403

​

   Support information and updates available at

   http://www.scyld.com/network/netsemi.html

​

   References:

   http://www.scyld.com/expert/100mbps.html

   http://www.scyld.com/expert/NWay.html

   Datasheet is available from:

   http://www.national.com/pf/DP/DP83815.html

*/

​

/* Revision History

 * October 2002 mar 1.0

 *   Initial U-Boot Release.  Tested with Netgear FA311 board

 *   and dp83815 chipset on custom board

*/

​

/* Includes */

#include <common.h>

#include <malloc.h>

#include <net.h>

#include <netdev.h>

#include <asm/io.h>

#include <pci.h>

​

/* defines */

#define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/

​

#define DSIZE       0x00000FFF

#define ETH_ALEN    6

#define CRC_SIZE    4

#define TOUT_LOOP   500000

#define TX_BUF_SIZE 1536

#define RX_BUF_SIZE 1536

#define NUM_RX_DESC 4   /* Number of Rx descriptor registers. */

​

/* Offsets to the device registers.

   Unlike software-only systems, device drivers interact with complex hardware.

   It's not useful to define symbolic names for every register bit in the

   device.  */

enum register_offsets {

    ChipCmd = 0x00,

    ChipConfig  = 0x04,

    EECtrl      = 0x08,

    IntrMask    = 0x14,

    IntrEnable  = 0x18,

    TxRingPtr   = 0x20,

    TxConfig    = 0x24,

    RxRingPtr   = 0x30,

    RxConfig    = 0x34,

    ClkRun      = 0x3C,

    RxFilterAddr    = 0x48,

    RxFilterData    = 0x4C,

    SiliconRev  = 0x58,

    PCIPM       = 0x44,

    BasicControl    = 0x80,

    BasicStatus = 0x84,

    /* These are from the spec, around page 78... on a separate table. */