uboot-phytec

/* SPDX-License-Identifier: GPL-2.0+ */

/*

 * sh_eth.h - Driver for Renesas SuperH ethernet controller.

 *

 * Copyright (C) 2008 - 2012 Renesas Solutions Corp.

 * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu

 * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com>

 */

​

#include <netdev.h>

#include <asm/types.h>

​

#define SHETHER_NAME "sh_eth"

​

#if defined(CONFIG_SH)

/* Malloc returns addresses in the P1 area (cacheable). However we need to

   use area P2 (non-cacheable) */

#define ADDR_TO_P2(addr)    ((((int)(addr) & ~0xe0000000) | 0xa0000000))

​

/* The ethernet controller needs to use physical addresses */

#if defined(CONFIG_SH_32BIT)

#define ADDR_TO_PHY(addr)   ((((int)(addr) & ~0xe0000000) | 0x40000000))

#else

#define ADDR_TO_PHY(addr)   ((int)(addr) & ~0xe0000000)

#endif

#elif defined(CONFIG_ARM)

#ifndef inl

#define inl readl

#define outl    writel

#endif

#define ADDR_TO_PHY(addr)   ((int)(addr))

#define ADDR_TO_P2(addr)    (addr)

#endif /* defined(CONFIG_SH) */

​

/* base padding size is 16 */

#ifndef CONFIG_SH_ETHER_ALIGNE_SIZE

#define CONFIG_SH_ETHER_ALIGNE_SIZE 16

#endif

​

/* Number of supported ports */

#define MAX_PORT_NUM    2

​

/* Buffers must be big enough to hold the largest ethernet frame. Also, rx

   buffers must be a multiple of 32 bytes */

#define MAX_BUF_SIZE    (48 * 32)

​

/* The number of tx descriptors must be large enough to point to 5 or more

   frames. If each frame uses 2 descriptors, at least 10 descriptors are needed.

   We use one descriptor per frame */

#define NUM_TX_DESC     8

​

/* The size of the tx descriptor is determined by how much padding is used.

   4, 20, or 52 bytes of padding can be used */

#define TX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)

​

/* Tx descriptor. We always use 3 bytes of padding */

struct tx_desc_s {

    volatile u32 td0;

    u32 td1;

    u32 td2;        /* Buffer start */

    u8 padding[TX_DESC_PADDING];    /* aligned cache line size */

};

​