uboot-phytec

// SPDX-License-Identifier: GPL-2.0+

/*

 *  Copyright 2014 - 2015 Freescale Semiconductor, Inc.

 *

 *  Driver for the Vitesse VSC9953 L2 Switch

 */

​

#include <asm/io.h>

#include <asm/fsl_serdes.h>

#include <fm_eth.h>

#include <fsl_memac.h>

#include <bitfield.h>

#include <errno.h>

#include <malloc.h>

#include <vsc9953.h>

#include <ethsw.h>

​

static struct vsc9953_info vsc9953_l2sw = {

        .port[0] = VSC9953_PORT_INFO_INITIALIZER(0),

        .port[1] = VSC9953_PORT_INFO_INITIALIZER(1),

        .port[2] = VSC9953_PORT_INFO_INITIALIZER(2),

        .port[3] = VSC9953_PORT_INFO_INITIALIZER(3),

        .port[4] = VSC9953_PORT_INFO_INITIALIZER(4),

        .port[5] = VSC9953_PORT_INFO_INITIALIZER(5),

        .port[6] = VSC9953_PORT_INFO_INITIALIZER(6),

        .port[7] = VSC9953_PORT_INFO_INITIALIZER(7),

        .port[8] = VSC9953_PORT_INFO_INITIALIZER(8),

        .port[9] = VSC9953_PORT_INFO_INITIALIZER(9),

};

​

void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus)

{

    if (!VSC9953_PORT_CHECK(port_no))

        return;

​

    vsc9953_l2sw.port[port_no].bus = bus;

}

​

void vsc9953_port_info_set_phy_address(int port_no, int address)

{

    if (!VSC9953_PORT_CHECK(port_no))

        return;

​

    vsc9953_l2sw.port[port_no].phyaddr = address;

}

​

void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int)

{

    if (!VSC9953_PORT_CHECK(port_no))

        return;

​

    vsc9953_l2sw.port[port_no].enet_if = phy_int;

}

​

void vsc9953_port_enable(int port_no)

{

    if (!VSC9953_PORT_CHECK(port_no))

        return;

​

    vsc9953_l2sw.port[port_no].enabled = 1;

}

​

void vsc9953_port_disable(int port_no)

{

    if (!VSC9953_PORT_CHECK(port_no))

        return;

​

    vsc9953_l2sw.port[port_no].enabled = 0;

}

​

static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr,

        int regnum, int value)

{

    int timeout = 50000;

​

    out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |

            ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |

            (0x1 << 1));

    asm("sync");

​

    while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)

        udelay(1);

​

    if (timeout == 0)

        debug("Timeout waiting for MDIO write\n");

}

​

static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr,

        int regnum)

{

    int value = 0xFFFF;

    int timeout = 50000;