uboot-phytec
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committed 112f2e14434x
log_debug("ahub: channels=%d, bitspersample=%d, cif_ctrl=%x, fifo_threshold=%d, id=%d\n",// SPDX-License-Identifier: GPL-2.0+159/* * Take from dc tegra_ahub.c * * Copyright 2018 Google LLC */struct tegra_ahub_priv { struct apbif_regs *apbif_regs; struct xbar_regs *xbar_regs; u32 full_mask; int capacity_words; /* FIFO capacity in words */ /* * This is unset intially, but is set by tegra_ahub_ioctl() called * from the misc_ioctl() in tegra_sound_probe() */ struct udevice *i2s; struct udevice *dma;};static int tegra_ahub_xbar_enable_i2s(struct xbar_regs *regs, int i2s_id){ /* * Enables I2S as the receiver of APBIF by writing APBIF_TX0 (0x01) to * the rx0 register */ switch (i2s_id) { case 0: writel(1, ®s->i2s0_rx0); break; case 1: writel(1, ®s->i2s1_rx0); break; case 2: writel(1, ®s->i2s2_rx0); break; case 3: writel(1, ®s->i2s3_rx0); break; case 4: writel(1, ®s->i2s4_rx0); break; default: log_err("Invalid I2S component id: %d\n", i2s_id); return -EINVAL; } return 0;}static int tegra_ahub_apbif_is_full(struct udevice *dev){ struct tegra_ahub_priv *priv = dev_get_priv(dev); return readl(&priv->apbif_regs->apbdma_live_stat) & priv->full_mask;}/** * tegra_ahub_wait_for_space() - Wait for space in the FIFO * * @return 0 if OK, -ETIMEDOUT if no space was available in time */static int tegra_ahub_wait_for_space(struct udevice *dev){ int i = 100000; ulong start; /* Busy-wait initially, since this should take almost no time */ while (i--) { if (!tegra_ahub_apbif_is_full(dev)) return 0; } /* Failed, so do a slower loop for 100ms */ start = get_timer(0); while (tegra_ahub_apbif_is_full(dev)) { if (get_timer(start) > 100) return -ETIMEDOUT; } return 0;