uboot-phytec

// SPDX-License-Identifier: GPL-2.0+

/*

 *

 * (C) Copyright 2000-2003

 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.

 *

 * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.

 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)

 *

 * Support for DM and DT, non-DM code removed.

 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>

 *

 * TODO: fsl_dspi.c should work as a driver for the DSPI module.

 */

​

#include <common.h>

#include <dm.h>

#include <dm/platform_data/spi_coldfire.h>

#include <spi.h>

#include <malloc.h>

#include <asm/coldfire/dspi.h>

#include <asm/io.h>

​

struct coldfire_spi_priv {

    struct dspi *regs;

    uint baudrate;

    int mode;

    int charbit;

};

​

DECLARE_GLOBAL_DATA_PTR;

​

#ifndef CONFIG_SPI_IDLE_VAL

#if defined(CONFIG_SPI_MMC)

#define CONFIG_SPI_IDLE_VAL 0xFFFF

#else

#define CONFIG_SPI_IDLE_VAL 0x0

#endif

#endif

​

/*

 * DSPI specific mode

 *

 * bit 31 - 28: Transfer size 3 to 16 bits

 *     27 - 26: PCS to SCK delay prescaler

 *     25 - 24: After SCK delay prescaler

 *     23 - 22: Delay after transfer prescaler

 *     21     : Allow overwrite for bit 31-22 and bit 20-8

 *     20     : Double baud rate

 *     19 - 16: PCS to SCK delay scaler

 *     15 - 12: After SCK delay scaler

 *     11 -  8: Delay after transfer scaler

 *      7 -  0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST

 */

#define SPI_MODE_MOD            0x00200000

#define SPI_MODE_DBLRATE        0x00100000

​

#define SPI_MODE_XFER_SZ_MASK       0xf0000000

#define SPI_MODE_DLY_PRE_MASK       0x0fc00000

#define SPI_MODE_DLY_SCA_MASK       0x000fff00

​

#define MCF_FRM_SZ_16BIT        DSPI_CTAR_TRSZ(0xf)

#define MCF_DSPI_SPEED_BESTMATCH    0x7FFFFFFF