Source of dw_hdmi.c - uboot-phytec - PHYTEC BitBucket (Stash)

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static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi, u32 n, u32 cts)
 
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (c) 2015 Google, Inc
 * Copyright 2014 Rockchip Inc.
 * Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
 */
​
#include <common.h>
#include <fdtdec.h>
#include <asm/io.h>
#include <i2c.h>
#include <media_bus_format.h>
#include "dw_hdmi.h"
​
struct tmds_n_cts {
    u32 tmds;
    u32 cts;
    u32 n;
};
​
static const struct tmds_n_cts n_cts_table[] = {
    {
        .tmds = 25175000, .n = 6144, .cts = 25175,
    }, {
        .tmds = 25200000, .n = 6144, .cts = 25200,
    }, {
        .tmds = 27000000, .n = 6144, .cts = 27000,
    }, {
        .tmds = 27027000, .n = 6144, .cts = 27027,
    }, {
        .tmds = 40000000, .n = 6144, .cts = 40000,
    }, {
        .tmds = 54000000, .n = 6144, .cts = 54000,
    }, {
        .tmds = 54054000, .n = 6144, .cts = 54054,
    }, {
        .tmds = 65000000, .n = 6144, .cts = 65000,
    }, {
        .tmds = 74176000, .n = 11648, .cts = 140625,
    }, {
        .tmds = 74250000, .n = 6144, .cts = 74250,
    }, {
        .tmds = 83500000, .n = 6144, .cts = 83500,
    }, {
        .tmds = 106500000, .n = 6144, .cts = 106500,
    }, {
        .tmds = 108000000, .n = 6144, .cts = 108000,
    }, {
        .tmds = 148352000, .n = 5824, .cts = 140625,
    }, {
        .tmds = 148500000, .n = 6144, .cts = 148500,
    }, {
        .tmds = 297000000, .n = 5120, .cts = 247500,
    }
};
​
static const u16 csc_coeff_default[3][4] = {
    { 0x2000, 0x0000, 0x0000, 0x0000 },
    { 0x0000, 0x2000, 0x0000, 0x0000 },
    { 0x0000, 0x0000, 0x2000, 0x0000 }
};
​
static const u16 csc_coeff_rgb_in_eitu601[3][4] = {
    { 0x2591, 0x1322, 0x074b, 0x0000 },
    { 0x6535, 0x2000, 0x7acc, 0x0200 },
    { 0x6acd, 0x7534, 0x2000, 0x0200 }
};
​
static const u16 csc_coeff_rgb_out_eitu601[3][4] = {
    { 0x2000, 0x6926, 0x74fd, 0x010e },
    { 0x2000, 0x2cdd, 0x0000, 0x7e9a },
    { 0x2000, 0x0000, 0x38b4, 0x7e3b }
};
​
static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset)
{
    switch (hdmi->reg_io_width) {
    case 1:
        writeb(val, hdmi->ioaddr + offset);
        break;
    case 4:
        writel(val, hdmi->ioaddr + (offset << 2));
        break;
    default:
        debug("reg_io_width has unsupported width!\n");
        break;
    }
}
​
static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset)
{
    switch (hdmi->reg_io_width) {