uboot-phytec

/* SPDX-License-Identifier: GPL-2.0+ */

/*

 * Porting to u-boot:

 *

 * (C) Copyright 2010

 * Stefano Babic, DENX Software Engineering, sbabic@denx.de

 *

 * Linux IPU driver for MX51:

 *

 * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.

 */

​

#ifndef __ASM_ARCH_IPU_H__

#define __ASM_ARCH_IPU_H__

​

#include <linux/types.h>

#include <ipu_pixfmt.h>

​

#define IDMA_CHAN_INVALID   0xFF

#define HIGH_RESOLUTION_WIDTH   1024

​

struct clk {

    const char *name;

    int id;

    /* Source clock this clk depends on */

    struct clk *parent;

    /* Secondary clock to enable/disable with this clock */

    struct clk *secondary;

    /* Current clock rate */

    unsigned long rate;

    /* Reference count of clock enable/disable */

    __s8 usecount;

    /* Register bit position for clock's enable/disable control. */

    u8 enable_shift;

    /* Register address for clock's enable/disable control. */

    void *enable_reg;

    u32 flags;

    /*

     * Function ptr to recalculate the clock's rate based on parent

     * clock's rate

     */

    void (*recalc) (struct clk *);

    /*

     * Function ptr to set the clock to a new rate. The rate must match a

     * supported rate returned from round_rate. Leave blank if clock is not

    * programmable

     */

    int (*set_rate) (struct clk *, unsigned long);

    /*

     * Function ptr to round the requested clock rate to the nearest

     * supported rate that is less than or equal to the requested rate.

     */

    unsigned long (*round_rate) (struct clk *, unsigned long);

    /*

     * Function ptr to enable the clock. Leave blank if clock can not

     * be gated.

     */

    int (*enable) (struct clk *);

    /*

     * Function ptr to disable the clock. Leave blank if clock can not

     * be gated.

     */

    void (*disable) (struct clk *);