linux-imx

/*

 * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

​

#include <linux/clk-provider.h>

#include <linux/of_address.h>

#include <linux/platform_device.h>

​

#include "ccu_common.h"

#include "ccu_reset.h"

​

#include "ccu_div.h"

#include "ccu_gate.h"

#include "ccu_mp.h"

#include "ccu_mux.h"

#include "ccu_nkmp.h"

#include "ccu_nm.h"

#include "ccu_phase.h"

​

#include "ccu-sun8i-a83t.h"

​

#define CCU_SUN8I_A83T_LOCK_REG 0x20c

​

/*

 * The CPU PLLs are actually NP clocks, with P being /1 or /4. However

 * P should only be used for output frequencies lower than 228 MHz.

 * Neither mainline Linux, U-boot, nor the vendor BSPs use these.

 *

 * For now we can just model it as a multiplier clock, and force P to /1.

 */

#define SUN8I_A83T_PLL_C0CPUX_REG   0x000

#define SUN8I_A83T_PLL_C1CPUX_REG   0x004

​

static struct ccu_mult pll_c0cpux_clk = {

    .enable     = BIT(31),

    .lock       = BIT(0),

    .mult       = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),

    .common     = {

        .reg        = SUN8I_A83T_PLL_C0CPUX_REG,

        .lock_reg   = CCU_SUN8I_A83T_LOCK_REG,

        .features   = CCU_FEATURE_LOCK_REG,

        .hw.init    = CLK_HW_INIT("pll-c0cpux", "osc24M",

                          &ccu_mult_ops,

                          CLK_SET_RATE_UNGATE),

    },

};

​

static struct ccu_mult pll_c1cpux_clk = {

    .enable     = BIT(31),

    .lock       = BIT(1),

    .mult       = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),

    .common     = {

        .reg        = SUN8I_A83T_PLL_C1CPUX_REG,

        .lock_reg   = CCU_SUN8I_A83T_LOCK_REG,