Commits
Shengjiu Wang committed 0f0a3d8e088
MLK-10515-2: ASoC: fsl_mqs: Move clk get_rate to hw_param It is too early to put clk get rate in probe, because the rate for the clock may not be ready. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>