Commits
Liu Ying committed 10cc7dba5b8
ARM: imx6qdl-sabresd.dtsi: Change LDB_DI0/1_SEL clk's parent to PLL2_PFD0_352M This patch changes LDB_DI0/1_SEL clock's parent from PLL3_USB_OTG to PLL2_PFD0_352M so that it aligns with imx_4.19.y kernel. Also, with this patch applied, the clock tree may provide ~64.6MHz pixel clock rate to the Hannstar XGA LVDS panel, which is closer to the desired 65MHz(before the change, it's ~68.5MHz). Signed-off-by: Liu Ying <victor.liu@nxp.com> (cherry picked from commit a76d0c86ada7717c1cb556a1ac1fc4dd022db8bc)