Commits
Michal Simek committed 173701d7745
microblaze: Clear all MSR flags on the first kernel instruction The main reason is bug because of dynamic TLB allocation. U-BOOT didn't disable dcache and then writing to physical address from ASM wan't visible for reading through MMU. Disabling caches and clearing all flags from previous code is good to do so. Signed-off-by: Michal Simek <monstr@monstr.eu>