Commits
Ludovic Desroches committed 2958ccee369
tty/serial: at91: fix bad offset for UART timeout register With SAMA5D2, the UART has hw timeout but the offset of the register to define this value is not the same as the one for USART. When using the new UART, the value of this register was 0 so we never get timeout irqs. It involves that when using DMA, we were stuck until the execution of the dma callback which happens when a buffer is full (so after receiving 2048 bytes). Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>