Commits
Yixun Lan committed 2fa9b361e50
clk: meson: axg: fix the od shift of the sys_pll
According to the datasheet, the od shift of sys_pll is actually 16.
Fixes: 78b4af312f91 ('clk: meson-axg: add clock controller drivers')
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[fixed commit message]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>