Commits
Emilio López committed 40a5dcba4e7
clk: sunxi: register factors clocks behind composite This commit reworks factors clock registration to be done behind a composite clock. This allows us to additionally add a gate, mux or divisors, as it will be needed by some future PLLs. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org>