Commits
Yijing Wang committed 503275bf371
tile/PCI: use cached pci_dev->pcie_mpss to simplify code The PCI core caches the "PCIe Max Payload Size Supported" in pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword(). Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>