Commits
Bill Huang committed 56fd27b31f1
clk: tegra: pll: Change misc_reg count from 3 to 6 New SoC's may have more than 3 MISC registers, so bump up the array size and use a #define to be more informative about the value. Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Bill Huang <bilhuang@nvidia.com> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>