Commits
Kuppuswamy Sathyanarayanan committed 62a7b9c859d
platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read To maintain the uniformity in accessing GCR registers, this patch modifies the S0ix counter read function to use GCR address base instead of ipc address base. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Tested-by: Shanth Murthy <shanth.murthy@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>