Commits
Arnd Bergmann committed 68526e58630
ARM: ux500: select L2X0 cache on ux500 The cache controller needs to be enabled for the cortex-a9 specific errata that are also selected to work. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>