Commits
Russell King committed 6910ceb5cab
Watchdog: fix clearing of the watchdog interrupt The bits in BRIDGE_CAUSE are documented as RW0C - read, write 0 to clear. If we read the register, mask off the watchdog bit, and write it back, we're actually clearing every interrupt which wasn't pending at the time we read the register - and that is racy. Fix this to only write ~WATCHDOG_BIT to the register, which means we write as zero only the watchdog bit. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Jason Cooper <jason@lakedaemon.net> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>