Commits
Rajendra Nayak committed 6c4a057bffe
ARM: OMAP4: clock data: Force a DPLL clkdm/pwrdm ON before a relock All DPLLs except USB are in ALWON powerdomain. Make sure the clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting a DPLL relock. So, mark the database accordingly. Without this fix, it was seen that DPLL relock fails while testing relock in a loop of USB DPLL. Cc: Nishanth Menon <nm@ti.com> Tested-by: Ameya Palande <ameya.palande@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>