Commits
Geert Uytterhoeven committed 77899dd2c09
arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Add a device node for the second Cortex-A53 CPU core on the Renesas R-Car V3M (r8a77970) SoC, and adjust the interrupt delivery masks for ARM Generic Interrupt Controller and Architectured Timer. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>