Commits
James Cosin committed 810f1512dc8
Blackfin: cpufreq: fix dpm_state_table This patch fixes an assumption that cclk's initial divisor will always be 1 (or 0 in the register). TSCALE is always initialized on startup with a value of 4 regardless of the inital cclk divisor; so, we can't make the assumption without making lots of other assumptions. The TPERIOD value is set with a value of the current cclk (value / (HZ * TSCALE)) - 1; so, we need to adjust based on this initial frequency and not use cclk's initial divisor for adjusting the tscale. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>