Commits
Fancy Fang committed a087a95aa2c
MLK-21150-3 drm/bridge: sec-dsim: add a new property 'pref-rate' Add a new property 'pref-rate' support which can be used to assign a different clock frequency for the DPHY PLL reference clock in the dtb file. And if this property does not exist, the default clock frequency for the reference clock will be used. And according to the spec, the DPHY PLL reference clk frequency should be in [6MHz, 300MHz] range. Signed-off-by: Fancy Fang <chen.fang@nxp.com>