Commits
Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' and 'clk-ti-flag-fix' into clk-next * clk-davinci: clk: davinci: Remove redundant dev_err calls clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks clk: davinci: New driver for TI DA8XX CFGCHIP clocks dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks clk: davinci: Add platform information for TI DM646x PSC clk: davinci: Add platform information for TI DM644x PSC clk: davinci: Add platform information for TI DM365 PSC clk: davinci: Add platform information for TI DM355 PSC clk: davinci: Add platform information for TI DA850 PSC clk: davinci: Add platform information for TI DA830 PSC clk: davinci: New driver for davinci PSC clocks dt-bindings: clock: New bindings for TI Davinci PSC clk: davinci: Add platform information for TI DM646x PLL clk: davinci: Add platform information for TI DM644x PLL clk: davinci: Add platform information for TI DM365 PLL clk: davinci: Add platform information for TI DM355 PLL clk: davinci: Add platform information for TI DA850 PLL clk: davinci: Add platform information for TI DA830 PLL clk: davinci: New driver for davinci PLL clocks dt-bindings: clock: Add new bindings for TI Davinci PLL clocks * clk-si544: clk: Add driver for the si544 clock generator chip * clk-rockchip: clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399 clk: rockchip: Fix error return in phase clock registration clk: rockchip: Correct the behaviour of restoring cached phase clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 clk: rockchip: Add 1.6GHz PLL rate for rk3399 clk: rockchip: Restore the clock phase after the rate was changed clk: rockchip: Prevent calculating mmc phase if clock rate is zero clk: rockchip: Free the memory on the error path clk: rockchip: document hdmi_phy external input for rk3328 clk: rockchip: add flags for rk3328 dclk_lcdc clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks clk: rockchip: protect all remaining rk3328 interconnect clocks clk: rockchip: export sclk_hdmi_sfc on rk3328 clk: rockchip: remove HCLK_VIO from rk3328 dt header clk: rockchip: fix hclk_vio_niu on rk3328 * clk-uniphier: clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: uniphier: add ethernet clock control support for PXs3 clk: uniphier: add Pro4/Pro5/PXs2 audio system clock * clk-ti-flag-fix: clk: ti: fix flag space conflict with clkctrl clocks clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
Showing diff to269bd202bc0
Stephen Boyd committed b03781920c8MMerge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and 'clk-renesa...
Wei Yongjun committed fc3fcb4ff19clk: davinci: Remove redundant dev_err calls There is a error message within devm_iore...
Mike Looijmans committed 953cc3e8117clk: Add driver for the si544 clock generator chip This patch adds the driver and devi...- Stephen Boyd committed f6ae7c36e69MMerge tag 'v4.17-rockchip-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind...
Kunihiko Hayashi committed 6f1aa4ef3f7clk: uniphier: add additional ethernet clock lines for Pro4 Pro4 SoC has clock lines f...
Tero Kristo committed 269bd202bc0clk: ti: fix flag space conflict with clkctrl clocks The introduction of support for C...