Commits
Ran Wang committed b1b26e7ed41
usb: dwc3: Add chip-specific compatible string Some Layerscape paltforms (such as LS1088A, LS2088A, etc) require update HW default cache type configuration to fix DWC3 init failure when applying property dma-coherent. Note that the cache type configuration is actually native feature of DWC3, not additional desgin coming from SoC, so add this support here. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com>