Commits
Todd E Brandt committed b8cac70afe9
PCI: Remove Intel Haswell D3 delays The latest Intel Haswell chipsets have a hardware optimization which allows on-chip PCI devices to ignore the 10ms delay before entering or exiting D3 suspend. This patch implements the optimization as a PCI quirk, since we want tight control over which devices use it. This way we can test each device individually to be sure there are no issues before we enable the quirk. The first set of devices are from the Haswell platform, which includes every PCI device that is on the northbridge and southbridge. This patch reduces the Haswell suspend time from 93 ms to 47 ms and resume time from 160 ms to 64 ms. Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>