Commits
Tushar Behera committed be0b420ad61
ARM: dts: Update the parent for Audss clocks in Exynos5420 Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux. As per the user manual, it should be CLK_MAU_EPLL. The problem surfaced when the bootloader in Peach-pit board set the EPLL clock as the parent of AUDSS mux. While booting the kernel, we used to get a system hang during late boot if CLK_MAU_EPLL was disabled. Signed-off-by: Tushar Behera <tushar.b@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Reported-by: Kevin Hilman <khilman@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>