Commits
Thomas Petazzoni committed c8f5a878e55
ARM: mvebu: use DT properties to fine-tune the L2 configuration In order to optimize the L2 cache performance, this commit adjusts the configuration of the L2 on the Cortex-A9 based Marvell EBU processors (Armada 375, 38x and 39x), using the appropriate DT properties. We enable double linefill, incr double linefill, data prefetch and disable double linefill on wrap. This matches the configuration that was fine tuned in the Marvell BSP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>