Commits
Yixun Lan committed cddcb20b2bb
clk: meson-axg: add clocks required by pcie driver Adding clocks for the pcie driver. Due to the ASIC design, the pcie controller re-use part of the mipi clock logic, so the mipi clock is also added. Tested-by: Jianxin Qin <jianxin.qin@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [amended to remove unnecessary locales] Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>