Commits
Manivannan Sadhasivam committed d64e1b3f5cc
dmaengine: owl: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC. The slave mode supports bus width of 4 bytes common for all peripherals and 1 byte specific for UART. The cyclic mode supports only block mode transfer. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>