linux-imx

mtd: fsmc_nand: Add BCH4 SW ECC support for SPEAr600

This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can
be used by boards equipped with a NAND chip that requires 4-bit ECC
strength. The SPEAr600 HW ECC only supports 1-bit ECC strength.

To enable SW BCH4, you need to specify this in your nand controller
DT node:

	nand-ecc-mode = "soft_bch";
	nand-ecc-strength = <4>;
	nand-ecc-step-size = <512>;

Tested on a custom SPEAr600 board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
[Brian: tweaked the comments a bit]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>