linux-imx

MLKU-114-2 crypto: caam - SCU firmware support

Some i.MX8 processors, e.g. i.MX8QM (QM, QP), i.MX8QX (QXP, DX) have a
System Controller Firmware (SCFW) running on a dedicated Cortex-M core
that provides power, clock, and resource management.

caam driver needs to be aware of SCU f/w presence, since some things
are done differently:

1. clocks are under SCU f/w control and are turned on automatically

2. there is no access to controller's register page (note however that
some registers are aliased in job rings' register pages)

It's worth mentioning that due to this, MCFGR[PS] cannot be read
and driver assumes MCFGR[PS] = b'0 - engine using 32-bit address pointers.
This is in sync with the limitation imposed by the
SECO (Security Controller) ROM and f/w running on a dedicated Cortex-M.

3. as a consequence of "2.", part of the initialization is moved in
other f/w (SCU, TF-A etc.), e.g. RNG initialization

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>