Commits
Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next * clk-ingenic: clk: ingenic: Remove set but not used variable 'enable' clk: ingenic: Fix doc of ingenic_cgu_div_info clk: ingenic: Fix round_rate misbehaving with non-integer dividers clk: ingenic: jz4740: Fix gating of UDC clock * clk-mtk-mux: clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel clk: mediatek: add MUX_GATE_FLAGS_2 * clk-qcom-sdm845-pcie: clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks * clk-mtk-crit: clk: mediatek: Mark bus and DRAM related clocks as critical clk: mediatek: Add flags to mtk_gate clk: mediatek: Add MUX_FLAGS macro * clk-mtk: clk: mediatek: correct cpu clock name for MT8173 SoC
Showing diff tod3174bc836d
- Stephen Boyd committed 75f486c015bMMerge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fi...
- YueHaibing committed 635bd69bbe9clk: ingenic: Remove set but not used variable 'enable' Fixes gcc '-Wunused-but-set-va...
- chunhui dai committed d3174bc836dclk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel The MUX clock of ...
- Bjorn Andersson committed 4b5a59a265fclk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks The PCIe PIPE clock in the GC...
- Jasper Mattsson committed b35656de2a1clk: mediatek: Mark bus and DRAM related clocks as critical Currently, DRAM-related cl...
- Seiya Wang committed 64f4466c887clk: mediatek: correct cpu clock name for MT8173 SoC Correct cpu clock name from ca57 ...