Commits
Michael Tretter committed f20387dfd06
media: allegro: add Allegro DVT video IP core driver Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device Technical Reference Manual uses the term VCU (Video Codec Unit) for the encoder, decoder and system integration block. This driver takes care of interacting with the MicroBlaze MCU that controls the actual IP cores. The IP cores and MCU are integrated in the FPGA. The xlnx_vcu driver is responsible for configuring the clocks and providing information about the codec configuration. The driver currently only supports the H.264 video encoder. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>