Commits
John Crispin committed f40e1f9d856
MIPS: lantiq: enable pci clk conditional for xrx200 SoC The xrx200 SoC family has the same PCI clock register layout as the AR9. Enable the same quirk as for AR9 Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4235/