Commits
Mengdong Lin committed f4c1a311d8d
ALSA: hda - only sync BCLK to the display clock for Haswell & Broadwell Only Intel Haswell and Broadwell have a separate HD-A controller (PCI device 3) for display audio, which needs to get 24MHz HD-A link BCLK from the variable display core clock through vendor specific registers EM4 & EM5. Other platforms (Baytrail, Braswell and Skylake) don't have this feature. So this patch checks the PCI device ID of the controller in haswell_set_bclk() and only sync BCLK for HSW and BDW. Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>